module muxgate(a, b, sel, out, outbar);
	input a, b, sel;
	output out, outbar;
	wire out, outbar;
	wire out1, out2, selb;
		and a1 (out1, a, sel);
		not i1 (selb, sel);
		and a2 (out2, selb, b);
		or o1 (out, out1, out2);
		not i2 (outbar, out);
endmodule //